Series arranged multiplexers specification support enablement circuit and method
Several circuits and methods that may be implemented to enable specification support of a plurality of interface components in an IC are disclosed. In an embodiment, a circuit includes a plurality of multiplexer circuits and a control circuit. The plurality of multiplexer circuits are configured to...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
18.10.2016
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Subjects | |
Online Access | Get full text |
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Summary: | Several circuits and methods that may be implemented to enable specification support of a plurality of interface components in an IC are disclosed. In an embodiment, a circuit includes a plurality of multiplexer circuits and a control circuit. The plurality of multiplexer circuits are configured to provide a plurality of data paths and a plurality of outputs according to a set of selection signals. The plurality of data paths is configurable for at least a first mode of operation or a second mode of operation based on the set of selection signals. The first mode of operation and the second mode of operation are associated with complimentary specifications. The control circuit is coupled with the plurality of multiplexer circuits in order to control the set of selection signals of the plurality of multiplexer circuits to thereby select one of the first mode and the second mode of operation. |
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Bibliography: | Application Number: US201313782702 |