Bridging circuitry between a memory controller and request agents in a system having multiple system memory protection schemes

• Main Authors: Savagaonkar Uday R, Borrayo Edgar, Nagarajan Ramadass, Chhabra Siddhartha, Long Men, Kulick Stanley S, Narendra Trivedi Alpa T, Ornelas Carlos
• Format: Patent
• Language: English
• Published: 13.09.2016
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

A processor is described that includes one or more processing cores. The processor includes a memory controller to interface with a system memory having a protected region and a non protected region. The processor includes a protection engine to protect against active and passive attacks. The processor includes an encryption/decryption engine to protect against passive attacks. The protection engine includes bridge circuitry coupled between the memory controller and the one or more processing cores. The bridge circuitry is also coupled to the protection engine and the encryption/decryption engine. The bridge circuitry is to route first requests directed to the protected region to the protection engine and to route second requests directed to the non protected region to the encryption/decryption engine.