Dynamic subroutine linkage optimizing shader performance

• Main Authors: RAPP JOHN L, LACEY MARK M, PEEPER CRAIG, ONEPPO MICHAEL V, BLISS ANDREW L
• Format: Patent
• Language: English
• Published: 12.07.2016
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; IMAGE DATA PROCESSING OR GENERATION, IN GENERAL; PHYSICS

Allocation of memory registers for shaders by a processor is described herein. For each shader, registers are allocated based on the shader's level of complexity. Simpler shader instances are restricted to a smaller number of memory registers. More complex shader instances are allotted more reg...