Method for forming alignment marks and structure of same

A method of fabrication of alignment marks for a non-STI CMOS image sensor is introduced. In some embodiments, zero layer alignment marks and active are alignment marks may be simultaneously formed on a wafer. A substrate of the wafer may be patterned to form one or more recesses in the substrate. T...

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Main Authors HSU TZU-HSUAN, TSENG HSIAO-HUI, YAUNG DUN-NIAN, HSU WEING, TU YEUR-LUEN, TING SHYH-FANN, CHOU CHENG-HSIEN, WANG CHINGUN, CHANG CHUN-WEI, LAI CHIH-YU, HSU KAIUN, CHOU SHIH PEI, CHEN SHENGAU
Format Patent
LanguageEnglish
Published 31.05.2016
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method of fabrication of alignment marks for a non-STI CMOS image sensor is introduced. In some embodiments, zero layer alignment marks and active are alignment marks may be simultaneously formed on a wafer. A substrate of the wafer may be patterned to form one or more recesses in the substrate. The recesses may be filled with a dielectric material using, for example, a field oxidation method and/or suitable deposition methods. Structures formed by the above process may correspond to elements of the zero layer alignment marks and/or to elements the active area alignment marks.
Bibliography:Application Number: US201414203242