Bonded stacked wafers and methods of electroplating bonded stacked wafers

A method including: providing a first wafer stack; applying a first bonding layer on the first wafer stack; providing a second wafer stack, where the second wafer stack includes vias; and applying a second bonding layer to the second wafer stack. The vias extend through the second wafer stack and to...

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Bibliographic Details
Main Authors YING XUEJUN, ZOU QUANBO, SRIDHAR UPPILI, KELKAR AMIT S
Format Patent
LanguageEnglish
Published 03.05.2016
Subjects
APPARATUS THEREFOR
BASIC ELECTRIC ELEMENTS
CHEMISTRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
ELECTROFORMING
ELECTROLYTIC OR ELECTROPHORETIC PROCESSES
METALLURGY
MICROSTRUCTURAL TECHNOLOGY
PERFORMING OPERATIONS
PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTIONOF COATINGS
PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
SEMICONDUCTOR DEVICES
TRANSPORTING
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Summary:A method including: providing a first wafer stack; applying a first bonding layer on the first wafer stack; providing a second wafer stack, where the second wafer stack includes vias; and applying a second bonding layer to the second wafer stack. The vias extend through the second wafer stack and to the second bonding layer. The second bonding layer is bonded to the first bonding layer. A seed layer is applied on a side of the second wafer stack opposite the second bonding layer such that a material of the seed layer (i) contacts the vias, and (ii) extends over and past ends of the second wafer stack and onto the first bonding layer.
Bibliography:Application Number: US201514605486