Multiple pass programming for memory with different program pulse widths
Techniques are provided for programming memory cells while reducing the effects of detrapping which cause a downshift in the threshold voltage distribution. Detrapping is particularly problematic for charge-trapping memory cells such as in a 3D stacked non-volatile memory device. After completion of...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
26.04.2016
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Subjects | |
Online Access | Get full text |
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Summary: | Techniques are provided for programming memory cells while reducing the effects of detrapping which cause a downshift in the threshold voltage distribution. Detrapping is particularly problematic for charge-trapping memory cells such as in a 3D stacked non-volatile memory device. After completion of a full programming pass, a verify test is performed to identify cells for which reprogramming is warranted. The reprogramming can include multiple program-verify iterations which use longer program pulses than in the full programming pass. Moreover, the number of program-verify iterations is limited to reduce the reprogramming time. In one approach, cells of all target data states are programmed together. In another approach, cells of different target data states are programmed separately. |
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Bibliography: | Application Number: US201414331784 |