Semiconductor device exhibiting reduced parasitics and method for making same
A semiconductor device includes a substrate and a gate stack disposed on the substrate. An upper layer of the gate stack is a metal gate conductor and a lower layer of the gate stack is a gate dielectric. A gate contact is in direct contact with the metal gate conductor.
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
01.03.2016
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Online Access | Get full text |
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Abstract | A semiconductor device includes a substrate and a gate stack disposed on the substrate. An upper layer of the gate stack is a metal gate conductor and a lower layer of the gate stack is a gate dielectric. A gate contact is in direct contact with the metal gate conductor. |
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AbstractList | A semiconductor device includes a substrate and a gate stack disposed on the substrate. An upper layer of the gate stack is a metal gate conductor and a lower layer of the gate stack is a gate dielectric. A gate contact is in direct contact with the metal gate conductor. |
Author | HON-WONG KEITH KWONG DORIS BRUCE B CHENG KANGGUO |
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RelatedCompanies | HON-WONG KEITH KWONG DORIS BRUCE B CHENG KANGGUO GLOBALFOUNDRIES INC |
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Snippet | A semiconductor device includes a substrate and a gate stack disposed on the substrate. An upper layer of the gate stack is a metal gate conductor and a lower... |
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SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | Semiconductor device exhibiting reduced parasitics and method for making same |
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