System level architecture verification for transaction execution in a multi-processing environment

Embodiments relate to building, by a computing device, a pseudo-random dynamic instruction stream that comprises instructions configured to perform a transaction execution. The computing device may cause the transaction execution to be tested in a multi-processing system based on the instruction str...

Full description

Saved in:
Bibliographic Details
Main Authors DUALE ALI Y, WITTIG DENNIS W
Format Patent
LanguageEnglish
Published 02.02.2016
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online AccessGet full text

Cover

More Information
Summary:Embodiments relate to building, by a computing device, a pseudo-random dynamic instruction stream that comprises instructions configured to perform a transaction execution. The computing device may cause the transaction execution to be tested in a multi-processing system based on the instruction stream. A status of the test may be output to one or more output devices.
Bibliography:Application Number: US201313782369