Passive devices for FinFET integrated circuit technologies

Device structures and design structures for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A device region is formed in a trench and is coupled with a handle wafer of a semiconductor-on-insulator sub...

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Bibliographic Details
Main Authors LI JUNJUN, STANDAERT THEODORUS E, GAUTHIER, JR. ROBERT J, CLARK, JR. WILLIAM F, WALLNER THOMAS A, HOOK TERENCE B
Format Patent
LanguageEnglish
Published 12.01.2016
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Summary:Device structures and design structures for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A device region is formed in a trench and is coupled with a handle wafer of a semiconductor-on-insulator substrate. The device region extends through a buried insulator layer of the semiconductor-on-insulator substrate toward a top surface of a device layer of the semiconductor-on-insulator substrate. The device region is comprised of lightly-doped semiconductor material. The device structure further includes a doped region formed in the device region and that defines a junction. A portion of the device region is laterally positioned between the doped region and the buried insulator layer of the semiconductor-on-insulator substrate. Another region of the device layer may be patterned to form fins for fin-type field-effect transistors.
Bibliography:Application Number: US201414513709