Minimum-spacing circuit design and layout for PICA

PICA test methods are shown that includes forming semiconductor devices having proximal light emitting regions, such that the light emitting regions are grouped into distinct shapes separated by a distance governed by a target resolution size; forming logic circuits to control the semiconductor devi...

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Bibliographic Details
Main Authors AINSPAN HERSCHEL A, STELLARI FRANCO, KIM SEONGWON, WEGER ALAN J
Format Patent
LanguageEnglish
Published 05.01.2016
Subjects
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
PULSE TECHNIQUE
TESTING
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Summary:PICA test methods are shown that includes forming semiconductor devices having proximal light emitting regions, such that the light emitting regions are grouped into distinct shapes separated by a distance governed by a target resolution size; forming logic circuits to control the semiconductor devices; activating the one or more semiconductor devices by providing an input signal; and suppressing light emissions from one or more of the activated semiconductor devices by providing one or more select signals to the logic circuits.
Bibliography:Application Number: US201213463166