Semiconductor grid array package

A semiconductor grid array package has a first housing member with a cavity that has a cavity floor and cavity walls. A semiconductor die is affixed to the cavity floor. A second housing member is molded to the first housing member and covers an interface surface of the die. Electrically conductive...

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Bibliographic Details
Main Authors LIM FUI YEE, YAP WENG FOONG
Format Patent
LanguageEnglish
Published 08.12.2015
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A semiconductor grid array package has a first housing member with a cavity that has a cavity floor and cavity walls. A semiconductor die is affixed to the cavity floor. A second housing member is molded to the first housing member and covers an interface surface of the die. Electrically conductive runners are mounted to an external surface of the second housing member. The runners have a wire contacting area and an external connector contacting area. Bond wires are selectively bonded to the external connection pads of the semiconductor die and selectively connected to the wire contacting area of the runners. External electrical connectors are mounted to a designated external connector contacting area.
Bibliography:Application Number: US201313773603