On-line memory testing systems and methods

A method for testing an electronic memory while the memory is in use includes: (a) detecting an access to the electronic memory at a test address, (b) saving, in a register subsystem, write data written to the electronic memory at a location corresponding to the test address, (c) comparing the write...

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Bibliographic Details
Main Authors YAGHMAI SOHRAB, PICALAUSA JENNY, SOLHUSVIK JOHANNES, KOCH KRISTOFFER ELLERSGAARD
Format Patent
LanguageEnglish
Published 01.12.2015
Subjects
INFORMATION STORAGE
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
STATIC STORES
TESTING
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Summary:A method for testing an electronic memory while the memory is in use includes: (a) detecting an access to the electronic memory at a test address, (b) saving, in a register subsystem, write data written to the electronic memory at a location corresponding to the test address, (c) comparing the write data to data read from the electronic memory at the location corresponding to the test address to determine whether the memory has a fault, and (d) generating an error signal if the memory has a fault.
Bibliography:Application Number: US201313892019