Caching agent for deadlock prevention in a processor by allowing requests that do not deplete available coherence resources

Disclosed herein is a caching agent for preventing deadlock in a processor. The caching agent includes a receiver configured to receive a request from a core of the processor. The caching agent includes ingress logic coupled to the receiver to determine that the request is potentially a cacheable re...

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Bibliographic Details
Main Authors FAHIM BAHAA, CHAMBERLAIN JEFFREY, LIU YENNG
Format Patent
LanguageEnglish
Published 17.11.2015
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Disclosed herein is a caching agent for preventing deadlock in a processor. The caching agent includes a receiver configured to receive a request from a core of the processor. The caching agent includes ingress logic coupled to the receiver to determine that the request is potentially a cacheable request. The ingress logic is to determine that the request does not deplete an available coherence resource. The ingress logic is to allow the request to be processed in response to the determination that the request does not deplete the available coherence resource.
Bibliography:Application Number: US201314142137