Using different programming modes to store data to a memory cell

Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with some embodiments, a memory cell is provided with a plurality of available programming states to accommodate multi-level cell (MLC) programming. A control circuit stores a single bit logical value to...

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Bibliographic Details
Main Authors SETIADI DADI, KIM YOUNGPIL, BOWMAN RODNEY VIRGIL, TIAN WEI
Format Patent
LanguageEnglish
Published 04.08.2015
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Summary:Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with some embodiments, a memory cell is provided with a plurality of available programming states to accommodate multi-level cell (MLC) programming. A control circuit stores a single bit logical value to the memory cell using single level cell (SLC) programming to provide a first read margin between first and second available programming states. The control circuit subsequently stores a single bit logical value to the memory cell using virtual multi-level cell (VMLC) programming to provide a larger, second read margin between the first available programming state and a third available programming state.
Bibliography:Application Number: US201314136708