Selective local metal cap layer formation for improved electromigration behavior
A method of forming a wiring structure for an integrated circuit device includes forming one or more copper lines within an interlevel dielectric layer (ILD); masking selected regions of the one or more copper lines; selectively plating metal cap regions over exposed regions of the one or more coppe...
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Main Authors | , , , , , , , , , |
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Format | Patent |
Language | English |
Published |
07.07.2015
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Subjects | |
Online Access | Get full text |
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Abstract | A method of forming a wiring structure for an integrated circuit device includes forming one or more copper lines within an interlevel dielectric layer (ILD); masking selected regions of the one or more copper lines; selectively plating metal cap regions over exposed regions of the one or more copper lines; and forming a conformal insulator layer over the metal cap regions and uncapped regions of the one or more copper lines. |
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AbstractList | A method of forming a wiring structure for an integrated circuit device includes forming one or more copper lines within an interlevel dielectric layer (ILD); masking selected regions of the one or more copper lines; selectively plating metal cap regions over exposed regions of the one or more copper lines; and forming a conformal insulator layer over the metal cap regions and uncapped regions of the one or more copper lines. |
Author | GRECO STEPHEN E LUSTIG NAFTALI E CULP JAMES A FILIPPI RONALD G SIMON ANDREW H CHOI SAMUEL S BAO JUNJING BONILLA GRISELDA ANGYAL MATTHEW S DYER THOMAS W |
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SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | Selective local metal cap layer formation for improved electromigration behavior |
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