Selective local metal cap layer formation for improved electromigration behavior

A method of forming a wiring structure for an integrated circuit device includes forming one or more copper lines within an interlevel dielectric layer (ILD); masking selected regions of the one or more copper lines; selectively plating metal cap regions over exposed regions of the one or more coppe...

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Main Authors FILIPPI RONALD G, SIMON ANDREW H, CULP JAMES A, DYER THOMAS W, GRECO STEPHEN E, CHOI SAMUEL S, BAO JUNJING, LUSTIG NAFTALI E, BONILLA GRISELDA, ANGYAL MATTHEW S
Format Patent
LanguageEnglish
Published 07.07.2015
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method of forming a wiring structure for an integrated circuit device includes forming one or more copper lines within an interlevel dielectric layer (ILD); masking selected regions of the one or more copper lines; selectively plating metal cap regions over exposed regions of the one or more copper lines; and forming a conformal insulator layer over the metal cap regions and uncapped regions of the one or more copper lines.
Bibliography:Application Number: US201313744705