Resistive random access memory devices having variable resistance layers and related methods

Resistive memory devices are provided having a gate stack including insulating layers and gates stacked on a substrate in a vertical direction, a channel penetrating the gate stack in the vertical direction to be electrically connected to the substrate, a gate insulating layer provided between the c...

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Bibliographic Details
Main Authors JU HYUNSU, YANG MIN KYU, CHOI JUNGDAL, KIM EUNMI, SHIN YOOCHEOL
Format Patent
LanguageEnglish
Published 16.06.2015
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Resistive memory devices are provided having a gate stack including insulating layers and gates stacked on a substrate in a vertical direction, a channel penetrating the gate stack in the vertical direction to be electrically connected to the substrate, a gate insulating layer provided between the channel and the gates, and a variable resistance layer disposed along an extending direction of the channel. The gate stack may include an alcove formed by recessing the gate in a horizontal direction. The variable resistance layer may extend toward the alcove in the horizontal direction and be overlapped with at least one of the gates in the horizontal direction. Related methods are also provided.
Bibliography:Application Number: US201314090803