Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate non-reactive post mask-opening clean

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask including a layer covering an...

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Bibliographic Details
Main Authors PARK JUNGRAE, EATON BRAD, LEI WEI-SHENG, KUMAR AJAY, PAPANU JAMES S
Format Patent
LanguageEnglish
Published 21.04.2015
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Summary:Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. Subsequent to patterning the mask, the exposed regions of the semiconductor wafer are cleaned with an anisotropic plasma process non-reactive to the exposed regions of the semiconductor wafer. Subsequent to cleaning the exposed regions of the semiconductor wafer, the semiconductor wafer is plasma etched through the gaps in the patterned mask to singulate the integrated circuits.
Bibliography:Application Number: US201414167347