Apparatus and method for adaptive frequency scaling in digital system

An apparatus and method for adaptively changing clock frequencies of a Central Processing Unit (CPU) and a bus in a digital system are provided. The system includes an Adaptive Frequency Scaling (AFS) controller and a clock controller. The AFS controller determines whether to change a clock frequenc...

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Bibliographic Details
Main Authors PARK TAE-HONG, KWON YUN-JU, HONG JONG-HYUCK, YOON JI-YONG, LEE KANG-MIN
Format Patent
LanguageEnglish
Published 30.12.2014
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:An apparatus and method for adaptively changing clock frequencies of a Central Processing Unit (CPU) and a bus in a digital system are provided. The system includes an Adaptive Frequency Scaling (AFS) controller and a clock controller. The AFS controller determines whether to change a clock frequency of the CPU according to operation information of the CPU, and determines whether to change a clock frequency of the bus according to operation information of the bus. The clock controller generates a clock frequency of the CPU and a clock frequency of the bus according to the determination of the AFS controller.
Bibliography:Application Number: US201113276503