Vertical mirror in a silicon photonic circuit

A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom su...

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Bibliographic Details
Main Authors LIU ANSHENG, RONG HAISHENG, HECK JOHN, MORSE MICHAEL T
Format Patent
LanguageEnglish
Published 12.08.2014
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
OPTICAL ELEMENTS, SYSTEMS, OR APPARATUS
OPTICS
PHYSICS
SEMICONDUCTOR DEVICES
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Summary:A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.
Bibliography:Application Number: US201313871083