Integrated circuit with self-aligned line and via

An integrated circuit is provided having a base with a first dielectric layer formed thereon. A second dielectric layer is formed over the first dielectric layer. A third dielectric layer is formed in spaced-apart strips over the second dielectric layer. A first trench opening is formed through the...

Full description

Saved in:
Bibliographic Details
Main Authors GOH WANG LING, CHA RANDALL CHER LIANG, SEE ALEX, LIM YEOW KHENG
Format Patent
LanguageEnglish
Published 01.07.2014
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:An integrated circuit is provided having a base with a first dielectric layer formed thereon. A second dielectric layer is formed over the first dielectric layer. A third dielectric layer is formed in spaced-apart strips over the second dielectric layer. A first trench opening is formed through the first and second dielectric layers between the spaced-apart strips of the third dielectric layer. A second trench opening is formed contiguously with the first trench opening through the first dielectric layer between the spaced-apart strips of the third dielectric layer. Conductor metals in the trench openings form self-aligned trench interconnects.
Bibliography:Application Number: US20060466018