System for generating clock signal

A system for generating a clock signal includes a phase-locked loop (PLL) and a voltage storage circuit. The PLL includes a voltage-controlled oscillator (VCO) that generates a clock signal based on a control voltage. The voltage storage circuit includes a unity-gain amplifier (UGA) and first, secon...

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Bibliographic Details
Main Authors GUPTA NITI, GUPTA SUNNY, SINHA SAMAKSH
Format Patent
LanguageEnglish
Published 24.06.2014
Subjects
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