Semiconductor memory device and method of controlling the same

According to one embodiment, a semiconductor memory device includes a memory cell array including blocks, each block being capable of executing a write, read, or erase operation independently of other blocks. A control portion is configured to execute the operation of a first block among the blocks...

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Bibliographic Details
Main Authors MITANI YUICHIRO, TODA HARUKI, MUROOKA KENICHI, TORIYAMA SHUICHI, HIGASHI YUSUKE, TAKASE SATORU
Format Patent
LanguageEnglish
Published 06.05.2014
Subjects
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:According to one embodiment, a semiconductor memory device includes a memory cell array including blocks, each block being capable of executing a write, read, or erase operation independently of other blocks. A control portion is configured to execute the operation of a first block among the blocks in a first cycle, set a selection inhibited region within a range of a predetermined distance from the first block, until a temperature relaxation time for relaxing a temperature of the first block has elapsed, set a region except the selection inhibited region among the blocks as a second block, and execute the operation of the second block in a second cycle.
Bibliography:Application Number: US201313773954