Stacked nanowire field effect transistor
A method for fabricating a nanowire field effect transistor device includes depositing a first sacrificial layer on a substrate, depositing a first layer of a semiconductor material on the first sacrificial layer, depositing a second sacrificial layer on the first layer of semiconductor material, de...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
25.03.2014
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Subjects | |
Online Access | Get full text |
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Summary: | A method for fabricating a nanowire field effect transistor device includes depositing a first sacrificial layer on a substrate, depositing a first layer of a semiconductor material on the first sacrificial layer, depositing a second sacrificial layer on the first layer of semiconductor material, depositing a second layer of the semiconductor material on the second sacrificial layer, pattering and removing portions of the first sacrificial layer, the first semiconductor layer, the second sacrificial layer, and the second semiconductor layer, patterning a dummy gate stack, removing the dummy gate stack, removing portions of the sacrificial layer to define a first nanowire including a portion of the first semiconductor layer and a second nanowire including a portion of the second semiconductor layer, and forming gate stacks about the first nanowire and the second nanowire. |
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Bibliography: | Application Number: US201213628726 |