Method and apparatus for circuit block reconfiguration EDA

Methods and apparatus are described for efficiently performing EDA processing to arrive at a hardware definition for a varying fraction of a large circuit design. EDA processing is conducted targeting a pseudo hardware device with sufficient capacity to embody circuitry for the varying fraction, but...

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Bibliographic Details
Main Authors CARVALHO NEVILLE, TSE JOHN
Format Patent
LanguageEnglish
Published 26.11.2013
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Methods and apparatus are described for efficiently performing EDA processing to arrive at a hardware definition for a varying fraction of a large circuit design. EDA processing is conducted targeting a pseudo hardware device with sufficient capacity to embody circuitry for the varying fraction, but substantially less than the true hardware target. The novel methods and apparatus may be beneficially employed to produce reconfiguration information for circuits that include programmable logic, for example.
Bibliography:Application Number: US20100719298