Unified optimistic and pessimistic concurrency control for a software transactional memory (STM) system

A method and apparatus for unified concurrency control in a Software Transactional Memory (STM) is herein described. A transaction record associated with a memory address referenced by a transactional memory access operation includes optimistic and pessimistic concurrency control fields. Access barr...

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Bibliographic Details
Main Authors OLIVIER JEFFREY V, ADL-TABATABAI ALI-REZA, BERKOWITS SION, NI YANG, TAL ADY, BACH MOSHE, COWNIE JAMES HENRY, SAHA BRATIN, WELE ADAM
Format Patent
LanguageEnglish
Published 08.10.2013
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A method and apparatus for unified concurrency control in a Software Transactional Memory (STM) is herein described. A transaction record associated with a memory address referenced by a transactional memory access operation includes optimistic and pessimistic concurrency control fields. Access barriers and other transactional operations/functions are utilized to maintain both fields of the transaction record, appropriately. Consequently, concurrent execution of optimistic and pessimistic transactions is enabled.
Bibliography:Application Number: US20080337507