Allocating registers for loop variables in a multi-threaded processor
A multi-threaded processor comprises a processing unit (PU) for concurrently processing multiple threads. A register file means (RF) is provided having a plurality of registers, wherein a first register (LI) is used for storing loop invariant values and N second registers (LVI-LVN) are each used for...
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Main Author | |
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Format | Patent |
Language | English |
Published |
17.09.2013
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Subjects | |
Online Access | Get full text |
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Summary: | A multi-threaded processor comprises a processing unit (PU) for concurrently processing multiple threads. A register file means (RF) is provided having a plurality of registers, wherein a first register (LI) is used for storing loop invariant values and N second registers (LVI-LVN) are each used for storing loop variant values. Furthermore N program counters (PCI-PCN) are provided each being associated to one of the multiple threads, wherein N being the number of threads being processed. |
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Bibliography: | Application Number: US20060814801 |