Semiconductor package and method of fabricating the same

This disclosure provides a semiconductor package and a method of fabricating the same. The semiconductor package includes an insulating layer; a plurality of traces and connection pads disposed in the insulating layer and protruded from the insulating layer; a plurality of bumps formed on the plural...

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Bibliographic Details
Main Authors TSAI YUEH-YING, CHEN YONG-LIANG, LIN PANGUN
Format Patent
LanguageEnglish
Published 03.09.2013
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:This disclosure provides a semiconductor package and a method of fabricating the same. The semiconductor package includes an insulating layer; a plurality of traces and connection pads disposed in the insulating layer and protruded from the insulating layer; a plurality of bumps formed on the plurality of traces; a semiconductor chip disposed on the bumps; and an encapsulant formed on the insulating layer to encapsulate the semiconductor chip, the plurality of bumps, traces and connection pads. When the encapsulant is formed, voids can be prevented from being generated in the traces and the connection pads and thus the yield of process is significantly increased.
Bibliography:Application Number: US201213349049