Apparatus and method for frequency calibration in frequency synthesizer
An apparatus and a method for frequency calibration in a frequency synthesizer are disclosed. The present invention includes an up/down processor. The up/down processor is utilized for outputting one of a GND voltage and a VDD voltage to a voltage-controlled oscillator via a loop filter in an open l...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
27.08.2013
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Subjects | |
Online Access | Get full text |
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Summary: | An apparatus and a method for frequency calibration in a frequency synthesizer are disclosed. The present invention includes an up/down processor. The up/down processor is utilized for outputting one of a GND voltage and a VDD voltage to a voltage-controlled oscillator via a loop filter in an open loop status, or outputting one of a step-up voltage and a step-down voltage in accordance with a phase difference to the voltage-controlled oscillator via the loop filter in a close loop status. When the up/down processor outputs one of the GND voltage and the VDD voltage in the open loop status, a memory bank selector compares frequencies for selecting a value of a memory bank and then adds an offset to the value of the memory bank so as to determine a final value of a VCO memory bank in the phase locked loop. |
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Bibliography: | Application Number: US201113158413 |