Integrated circuit including a programmable logic analyzer with enhanced analyzing and debugging capabilities and a method therefor

An integrated circuit including a logic analyzer with enhanced analyzing and debugging capabilities and a method therefore. In one embodiment, an integrated circuit includes a logic analyzer having a first input receiving a plurality of signals and an output for providing an indication of a detectio...

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Bibliographic Details
Main Authors SHARPE JAMES PATRICK, CASE CHRISTOPHER WILSON, BAILEY JAMES RAY
Format Patent
LanguageEnglish
Published 20.08.2013
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Summary:An integrated circuit including a logic analyzer with enhanced analyzing and debugging capabilities and a method therefore. In one embodiment, an integrated circuit includes a logic analyzer having a first input receiving a plurality of signals and an output for providing an indication of a detection, by the logic analyzer, of at least one trigger event; and a built in self test block having a first input for receiving one or more of the signals appearing at the first input of the logic analyzer, a second input coupled to the output of the logic analyzer for selectively enabling the BIST block, the BIST block generating and maintaining a signature based upon the first and second inputs thereof.
Bibliography:Application Number: US20100877846