Connected standby sleep state

Power consumption and dissipation during sleep states of processors is reduced using a novel connected standby sleep state. In the connected standby sleep state a dedicated power plane is used to maintain processor context. To conserve power, unnecessary components on the processor are powered down,...

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Bibliographic Details
Main Author HAJ-YIHIA JAWAD
Format Patent
LanguageEnglish
Published 04.06.2013
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Power consumption and dissipation during sleep states of processors is reduced using a novel connected standby sleep state. In the connected standby sleep state a dedicated power plane is used to maintain processor context. To conserve power, unnecessary components on the processor are powered down, including all of the clock components, and wakeup sources previously directed to the processor are directed to a platform control hub. The platform control hub sustains certain architectural functions for the processor during connected standby sleep state, and manages the wakeup logic for returning the processor to the preceding sleep state.
Bibliography:Application Number: US201213535809