Optimized arbiter using multi-level arbitration

An apparatus comprising a first sub-arbiter circuit and a second sub-arbiter circuit. The first sub-arbiter circuit may be configured to determine a winning channel from a plurality of channel requests based on a first criteria. The second sub-arbiter circuit may be configured to determine a winning...

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Bibliographic Details
Main Authors ARNTZEN ESKILD T, FREDENBERG SHERI L, ELLIS JACKSON L
Format Patent
LanguageEnglish
Published 02.04.2013
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:An apparatus comprising a first sub-arbiter circuit and a second sub-arbiter circuit. The first sub-arbiter circuit may be configured to determine a winning channel from a plurality of channel requests based on a first criteria. The second sub-arbiter circuit may be configured to determine a winning channel received from the plurality of channel requests based on a second criteria. The second sub-arbiter may also be configured to optimize the order of the winning channels from the first sub-arbiter by overriding the first sub-arbiter if the second criteria creates a more efficient data transfer.
Bibliography:Application Number: US20100878194