Power control loop, transmitter with the power control loop and method for controlling output power of a transmitter device
A power control loop includes a low-frequency signal path and a high-frequency signal path with the delay compensation block. The delay compensation block is used to determine a correlation between an average reference level and an average measured power level. The result may control a delay line to...
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Main Author | |
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Format | Patent |
Language | English |
Published |
05.03.2013
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Subjects | |
Online Access | Get full text |
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Summary: | A power control loop includes a low-frequency signal path and a high-frequency signal path with the delay compensation block. The delay compensation block is used to determine a correlation between an average reference level and an average measured power level. The result may control a delay line to compensate a time misalignment in the power control loop. |
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Bibliography: | Application Number: US20070958949 |