Clock synchronization in a bidirectional network

An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of Ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing technique...

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Bibliographic Details
Main Authors BRICKELL JOHN W, FARCAS FLORIN, MOBLEY JOSEPH GRAHAM, WEST, JR. LAMAR E, RITCHIE, JR. JOHN A, BLASHEWSKI STEVEN E, FUTCH RICHARD J, SORENSON DONALD C, AO JIENING
Format Patent
LanguageEnglish
Published 29.01.2013
Subjects
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
MULTIPLEX COMMUNICATION
PICTORIAL COMMUNICATION, e.g. TELEVISION
TRANSMISSION
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:An architecture for providing high-speed access over frequency-division multiplexed (FDM) channels allows transmission of Ethernet frames and/or other data across a cable transmission network or other form of FDM transport. The architecture involves downstream and upstream FDM multiplexing techniques to allow contemporaneous, parallel communications across a plurality of frequency channels. Furthermore, the architecture allows a central concentrator to support a plurality of remote devices that each has guaranteed bandwidth through connection-oriented allocations of bi-directional data flows. The upstream and downstream bandwidth allocation can support symmetrical bandwidth as well as asymmetrical bandwidth in either direction. As a local network, the architecture supports guaranteed bandwidth for delivery of data flows to a plurality of host devices.
Bibliography:Application Number: US20090422593