Method of efficiently implementing a MPEG-4 AVC deblocking filter on an array of parallel processors

A method for implementing a deblocking filter comprising the steps of (A) providing an input buffer storing an unfiltered video frame, (B) providing an output buffer configured to store a filtered video frame, (C) reading pixel values for a plurality of macroblocks from the input buffer into a worki...

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Bibliographic Details
Main Author LEWIS BRIAN G
Format Patent
LanguageEnglish
Published 23.10.2012
Subjects
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
PICTORIAL COMMUNICATION, e.g. TELEVISION
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Summary:A method for implementing a deblocking filter comprising the steps of (A) providing an input buffer storing an unfiltered video frame, (B) providing an output buffer configured to store a filtered video frame, (C) reading pixel values for a plurality of macroblocks from the input buffer into a working buffer, (D) sequentially processing the pixel values in the working buffer through a plurality of filter stages using an array of parallel processors, where each of the plurality of filter stages operates on a different set of pixel values in the working buffer and (E) writing pixel values from a final output region of the working buffer to a respective filter output region of the output buffer.
Bibliography:Application Number: US20080342229