Memory circuit simulation system and method with refresh capabilities

A system and method are provided including an interface circuit in communication with a plurality of memory circuits and a system. The interface circuit is operable to interface the plurality of memory circuits and the system for simulating at least one memory circuit with at least one aspect that i...

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Bibliographic Details
Main Authors RAJAN SURESH NATARAJAN, SCHAKEL KEITH R, WANG DAVID T, SMITH MICHAEL JOHN SEBASTIAN, WEBER FREDERICK DANIEL
Format Patent
LanguageEnglish
Published 02.10.2012
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Summary:A system and method are provided including an interface circuit in communication with a plurality of memory circuits and a system. The interface circuit is operable to interface the plurality of memory circuits and the system for simulating at least one memory circuit with at least one aspect that is different from at least one aspect of at least one of the plurality of memory circuits. The interface circuit is further operable to control refreshing of the plurality of memory circuits.
Bibliography:Application Number: US20060553399