Semiconductor device having a multilayer interconnection structure that includes an etching stopper film

A semiconductor device includes a lower layer wiring made of a conductive material; an etching stopper film laminated on the lower layer wiring and having a laminated structure including an SiCO layer and an SiCN layer; an interlayer insulating film laminated on the etching stopper film; an intermed...

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Bibliographic Details
Main Author KAGEYAMA SATOSHI
Format Patent
LanguageEnglish
Published 24.07.2012
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Summary:A semiconductor device includes a lower layer wiring made of a conductive material; an etching stopper film laminated on the lower layer wiring and having a laminated structure including an SiCO layer and an SiCN layer; an interlayer insulating film laminated on the etching stopper film; an intermediate film laminated on the interlayer insulating film and made of a material having an etching selectivity with respect to a material of the etching stopper film; an upper wiring layer laminated on the intermediate film and having an upper groove formed in a top surface thereof; an upper layer wiring embedded in the upper groove and made of a metal material having Cu as a main component; and a via electrically connecting the lower layer wiring and the upper layer wiring and disposed in a via hole penetrating through the interlayer insulating film and the intermediate film.
Bibliography:Application Number: US20080289985