Error correcting Viterbi decoder

Methods and corresponding systems in a Viterbi decoder include computing a maximum likelihood (ML) path in a Viterbi trellis in response to executing a first Viterbi algorithm. Thereafter, one or more merge points are selected on the ML path in a second Viterbi algorithm, wherein the merge points ea...

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Bibliographic Details
Main Authors TRAYLOR KEVIN B, BECKER CHRISTOPHER J
Format Patent
LanguageEnglish
Published 15.05.2012
Subjects
BASIC ELECTRONIC CIRCUITRY
CALCULATING
CODE CONVERSION IN GENERAL
CODING
COMPUTING
COUNTING
DECODING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:Methods and corresponding systems in a Viterbi decoder include computing a maximum likelihood (ML) path in a Viterbi trellis in response to executing a first Viterbi algorithm. Thereafter, one or more merge points are selected on the ML path in a second Viterbi algorithm, wherein the merge points each have a path metric difference, which is a difference between an ML path metric at the merge point and a non-surviving path metric at the merge point. Merge points are selected based upon relative path metric differences associated with nodes on the ML path. Next, alternate paths in the Viterbi trellis are computed based on the ML path with alternate paths substituted at corresponding merge points. A passing decoded bit sequence is output in response to passing an error check, wherein the passing decoded bit sequence is associated with one of the one or more alternate paths.
Bibliography:Application Number: US20080157512