Buffering architecture for packet injection and extraction in on-chip networks

• Main Authors: MARUCCIA GIUSEPPE, PIERALISI LORENZO, COPPOLA MARCELLO, LOCATELLI RICCARDO
• Format: Patent
• Language: English
• Published: 24.04.2012
• Subjects: ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION

This method for transferring data through a network on chip (NoC) between a first electronic device and a second electronic device, comprising: retrieving from the first device request packets comprising request control data for controlling data transfer and actual request data to be transferred; storing said request control and data to be transferred in memory means provided in an network interface (NI); and elaborating data packets to be transferred to the second device through said network, said data packets comprising a header and a payload elaborated from said control data and said actual data, respectively; The control data and the actual data to be transferred are stored in separate first and second memory means.