Non-volatile two-transistor semiconductor memory cell and method for producing the same
The invention relates to a nonvolatile semiconductor memory cell and to an associated fabrication method, a source region (7), a drain region (8) and a channel region lying in between being formed in a substrate (1). In order to realize locally delimited memory locations (LB, RB), an electrically no...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
10.04.2012
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Subjects | |
Online Access | Get full text |
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Summary: | The invention relates to a nonvolatile semiconductor memory cell and to an associated fabrication method, a source region (7), a drain region (8) and a channel region lying in between being formed in a substrate (1). In order to realize locally delimited memory locations (LB, RB), an electrically non-conductive charge storage layer (3) situated on a first insulation layer (2) is divided by an interruption (U), thereby preventing, in particular, a lateral charge transport between the memory locations (LB, RB) and significantly improving the charge retention properties. |
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Bibliography: | Application Number: US20080079003 |