Nonvolatile semiconductor memory device

The memory cell is located at respective intersections between the first wirings and the second wirings. Each of the memory cells has a rectifier element and a variable resistance element connected in series. The rectifier element includes a p type first semiconductor region, and a n type second sem...

Full description

Saved in:
Bibliographic Details
Main Authors KANNO HIROSHI, HIROTA JUN, MUROOKA KENICHI, TABATA HIDEYUKI
Format Patent
LanguageEnglish
Published 27.12.2011
Subjects
ELECTRICITY
Online AccessGet full text

Cover

More Information
Summary:The memory cell is located at respective intersections between the first wirings and the second wirings. Each of the memory cells has a rectifier element and a variable resistance element connected in series. The rectifier element includes a p type first semiconductor region, and a n type second semiconductor region. The first semiconductor region is formed of, at least in part, silicon-germanium mixture (Si1-xGex (0<x<=1)). The second semiconductor region is formed of silicon (Si).
Bibliography:Application Number: US20090556005