Error correction algorithm selection based upon memory organization

A method is provided for implementing at least one of a number of error correction algorithms operable on a memory. In the method, each of the error correction algorithms is provided. At least one of the error correction algorithms is then selected based on the organization of the memory. At least o...

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Bibliographic Details
Main Author THAYER LARRY J
Format Patent
LanguageEnglish
Published 05.07.2011
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A method is provided for implementing at least one of a number of error correction algorithms operable on a memory. In the method, each of the error correction algorithms is provided. At least one of the error correction algorithms is then selected based on the organization of the memory. At least one error in the memory is corrected using the selected error correction algorithm.
Bibliography:Application Number: US20070627519