Method and apparatus for setting cache policies in a processor

According to the methods and apparatus taught herein, processor caching policies are determined using cache policy information associated with a target memory device accessed during a memory operation. According to one embodiment of a processor, the processor comprises at least one cache and a memor...

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Bibliographic Details
Main Author MORROW MICHAEL WILLIAM
Format Patent
LanguageEnglish
Published 24.05.2011
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:According to the methods and apparatus taught herein, processor caching policies are determined using cache policy information associated with a target memory device accessed during a memory operation. According to one embodiment of a processor, the processor comprises at least one cache and a memory management unit. The at least one cache is configured to store information local to the processor. The memory management unit is configured to set one or more cache policies for the at least one cache. The memory management unit sets the one or more cache policies based on cache policy information associated with one or more target memory devices configured to store information used by the processor.
Bibliography:Application Number: US20070626434