Arithmetic circuit, arithmetic method, and information processing device

To provide a floating point arithmetic circuit for efficiently defecting an error, which has a large numerical error, with a less circuit amount, the floating point arithmetic circuit comprises a first arithmetic unit for outputting a first arithmetic result, a second arithmetic unit for outputting...

Full description

Saved in:
Bibliographic Details
Main Author ANDO HISASHIGE
Format Patent
LanguageEnglish
Published 10.05.2011
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online AccessGet full text

Cover

More Information
Summary:To provide a floating point arithmetic circuit for efficiently defecting an error, which has a large numerical error, with a less circuit amount, the floating point arithmetic circuit comprises a first arithmetic unit for outputting a first arithmetic result, a second arithmetic unit for outputting a second arithmetic result, and a comparison circuit for making a comparison between the first and the second arithmetic results by a predetermined bit width.
Bibliography:Application Number: US20070864084