Trimming circuit and method for replica type voltage regulators
The present invention is directed to a trimming circuit and method for replica type voltage regulators. A voltage regulator circuit includes an operational amplifier (OPAMP) and a n-type metal oxide silicon (NMOS) device. An output of the OPAMP is coupled to a gate terminal of the NMOS device. The v...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
01.02.2011
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Subjects | |
Online Access | Get full text |
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Summary: | The present invention is directed to a trimming circuit and method for replica type voltage regulators. A voltage regulator circuit includes an operational amplifier (OPAMP) and a n-type metal oxide silicon (NMOS) device. An output of the OPAMP is coupled to a gate terminal of the NMOS device. The voltage regulator circuit includes a potential divider circuit comprising a plurality of discrete devices coupled in series. A source terminal of the NMOS device is coupled to the potential divider circuit to form an output feedback node. The body of the NMOS device is biased variably across a plurality of tap points formed between consecutive discrete devices in the potential divider circuit. |
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Bibliography: | Application Number: US20070961905 |