Trimming circuit and method for replica type voltage regulators

The present invention is directed to a trimming circuit and method for replica type voltage regulators. A voltage regulator circuit includes an operational amplifier (OPAMP) and a n-type metal oxide silicon (NMOS) device. An output of the OPAMP is coupled to a gate terminal of the NMOS device. The v...

Full description

Saved in:
Bibliographic Details
Main Authors PRASAD SOUNDARARAJAN SRINIVASA, KRISHNA DAMARAJU NAGA RADHA
Format Patent
LanguageEnglish
Published 01.02.2011
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:The present invention is directed to a trimming circuit and method for replica type voltage regulators. A voltage regulator circuit includes an operational amplifier (OPAMP) and a n-type metal oxide silicon (NMOS) device. An output of the OPAMP is coupled to a gate terminal of the NMOS device. The voltage regulator circuit includes a potential divider circuit comprising a plurality of discrete devices coupled in series. A source terminal of the NMOS device is coupled to the potential divider circuit to form an output feedback node. The body of the NMOS device is biased variably across a plurality of tap points formed between consecutive discrete devices in the potential divider circuit.
Bibliography:Application Number: US20070961905