Methods of operating phase-change random access memory devices

A phase-change random access memory (PRAM) device includes a plurality of banks, a plurality of column redundancy cell arrays, and a plurality of column redundancy write drivers. Each of the plurality of column redundancy cell arrays corresponds to at least one of the banks. Each of the plurality of...

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Bibliographic Details
Main Authors PARK JONGUL, KIM KI-SUNG, CHO HO-KEUN, CHOI CHANG-HAN, CHOI BYUNG-GIL, SEO JONG-SOO
Format Patent
LanguageEnglish
Published 07.12.2010
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Summary:A phase-change random access memory (PRAM) device includes a plurality of banks, a plurality of column redundancy cell arrays, and a plurality of column redundancy write drivers. Each of the plurality of column redundancy cell arrays corresponds to at least one of the banks. Each of the plurality of column redundancy write drivers corresponds to at least one of the column redundancy cell arrays. The column redundancy write drivers are configured to transmit respective redundancy test data to the corresponding ones of the column redundancy cell arrays in response to a test control signal, which may be activated in response to each program pulse for writing data. Related test and access methods are also discussed.
Bibliography:Application Number: US20090350344