Sizing and placement of charge recycling (CR) transistors in multithreshold complementary metal-oxide-semiconductor (MTCMOS) circuits

In one embodiment, a circuit includes a first row of circuit blocks that are each connected to a supply directly and to ground via a first sleep transistor. A connection between the first circuit block and the first sleep transistor is a virtual ground node. The circuit includes a second row of circ...

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Bibliographic Details
Main Authors PEDRAM MASSOUD, FALLAH FARZAN, PAKBAZNIA EHSAN
Format Patent
LanguageEnglish
Published 16.11.2010
Subjects
BASIC ELECTRONIC CIRCUITRY
CONTROLLING
ELECTRICITY
PHYSICS
PULSE TECHNIQUE
REGULATING
SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
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Summary:In one embodiment, a circuit includes a first row of circuit blocks that are each connected to a supply directly and to ground via a first sleep transistor. A connection between the first circuit block and the first sleep transistor is a virtual ground node. The circuit includes a second row of circuit blocks that are each connected to ground directly and to the supply via a second sleep transistor. A connection between the second circuit block and the second sleep transistor is a virtual supply node. The circuit includes a transmission gate (TG) or pass transistor connecting the virtual ground nodes to the virtual supply nodes to enable charge recycling between circuit blocks in the first row and circuit blocks in the second row during transitions by the circuit from active mode to sleep mode, from sleep mode to active mode, or both.
Bibliography:Application Number: US20080263312