Determining sizes of FIFO buffers between functional blocks in an electronic circuit

Approaches for sizing first-in-first-out (FIFO) buffers for pipelining functions of a circuit. Functions of the circuit are performed on an input data set, with respective FIFO buffers for buffering data elements between coupled pairs of the functional blocks. While performing the functions of the c...

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Bibliographic Details
Main Authors MASON JEFFREY M, BENNETT DAVID W
Format Patent
LanguageEnglish
Published 19.10.2010
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Summary:Approaches for sizing first-in-first-out (FIFO) buffers for pipelining functions of a circuit. Functions of the circuit are performed on an input data set, with respective FIFO buffers for buffering data elements between coupled pairs of the functional blocks. While performing the functions of the circuit, a respective current number of elements added to a FIFO buffer since a previous element was removed from the FIFO buffer is counted for each FIFO buffer, and then compared to a respective saved number. The respective current number is saved as a new respective saved number in response to the respective current number being greater than the respective saved number, and the respective current number is reset after the comparing of the respective current number to the respective saved number. Respective sizes for the FIFO buffers are determined as a function of the respective saved numbers and then the sizes are stored.
Bibliography:Application Number: US20080261191