Method and apparatus for virtual quad-port random access memory

Embedded logic circuits in combination with a configurable logic resources on a common integrated circuit facilitates over-clocked operation of embedded, dual-port memory blocks. The implementation yields fully independent and simultaneous read/write access to the dual-port memory blocks from the co...

Full description

Saved in:
Bibliographic Details
Main Author SIMKINS JAMES M
Format Patent
LanguageEnglish
Published 14.09.2010
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:Embedded logic circuits in combination with a configurable logic resources on a common integrated circuit facilitates over-clocked operation of embedded, dual-port memory blocks. The implementation yields fully independent and simultaneous read/write access to the dual-port memory blocks from the configurable logic on each clock cycle of the configurable logic. Error detection/correction and data scrubbing is also facilitated by the embedded logic circuits, such that error detection/correction is completely transparent to the configurable logic, while data scrubbing is performed with minimal degradation to the memory access bandwidth of the configurable logic.
Bibliography:Application Number: US20050184310