Multi-bit flash memory devices having a single latch structure and related programming methods, systems and memory cards

A multi-bit non-volatile memory device is provided. The memory device includes a memory cell array including a plurality of memory cells. A page buffer is electrically coupled to the memory cell array. The page buffer includes a plurality of latches configured to store a first bit of multi-bit data...

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Bibliographic Details
Main Authors LEE JIN-YUP, LEE HO-KIL
Format Patent
LanguageEnglish
Published 05.01.2010
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A multi-bit non-volatile memory device is provided. The memory device includes a memory cell array including a plurality of memory cells. A page buffer is electrically coupled to the memory cell array. The page buffer includes a plurality of latches configured to store a first bit of multi-bit data to be written into or read out from one of the plurality of memory cells of the memory cell array. A buffer random access memory (RAM) is electrically coupled to the page buffer. The buffer RAM is configured to store a second bit of the multi-bit data to be written into or read out from one of the plurality of memory cells of the memory cell array. Related systems, memory cards and methods are also provided.
Bibliography:Application Number: US20070801792